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                                                            ¡¡¡¡×îºó¶ÔÓ²¼þµç·ºÍ FPGA Êý¾ÝͨÐÅÄ£¿é½øÐвâÊÔ¡£Ê×ÏÈ£¬¶Ôµ¯ÔؼÆËã»ú°å½øÐÐÉÏµç ²âÊÔ£¬È·±£Éϵçºó£¬µ¯ÔؼÆËã»ú°å¿ÉÒÔÕý³£¹¤×÷£»È»ºó¶ÔµçѹÁ¿²É¼¯Ä£¿é¡¢´®¿ÚÊý¾ÝÊÕ ·¢Ä£¿éºÍ CAN Êý¾ÝÊÕ·¢Ä£¿é½øÐÐÏà¹Ø²âÊÔ£¬È·±£ËùÉè¼ÆµÄÿ¸öÄ£¿é¶¼ÄÜʵÏÖ¹¦ÄÜ¡£²â ÊÔ½á¹û±íÃ÷µ¯ÔؼÆËã»úÄܹ»Âú×ãϵͳµÄÉè¼ÆÒªÇó¡£

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                                                            Abstract

                                                            ¡¡¡¡This paper takes a navigation integrated control device project as the research background, and expounds the hardware design of the missile-borne computer based on dual DSP+FPGA. Using a single computer to complete navigation and flight control task processing, not only effectively reduces the volume, cost and power consumption of the missile-borne computer, but also improves the reliability of the system. At the same time, the advantages of the dual computer system in the traditional design are completely preserved, that is, the navigation and flight control tasks are independently completed. This paper mainly studies and designs hardware circuits and FPGA-based data communication modules.

                                                            ¡¡¡¡The hardware circuit of the missile-borne computer is mainly pided into a power supply reset module, a core processor module and a signal interface module. The power supply reset module provides power and reset signals for each module of the missile-borne computer. The core processing module adopts dual DSP+FPGA architecture, the main DSP completes the flight control calculation, the secondary DSP completes the navigation solution, and communication between dual DSPs is achieved through the McBSP serial port; the FPGA chip is used for data acquisition and expansion of the peripheral interface, and communication between FPGA and DSP is realized through EMIF interface. The signal interface module mainly completes the electrical matching and isolation of the core processing module and the peripheral communication module.

                                                            ¡¡¡¡The data communication module based on FPGA adopts top-down design method and Verilog HDL hardware programming language to realize FPGA logic control in Xilinx ISE development environment, including voltage acquisition module, serial data transceiver module and CAN data transceiver module.Finally, the hardware circuit and the FPGA data communication module are tested. Firstly, the power-on test was carried out to ensure that the missile-borne computer board can work normally after power-on. Then, the voltage quantity acquisition module, the serial port data transceiver module and the CAN data transceiver module are tested to ensure that each module designed can achieve the function. The test results show that the missile-borne computer can meet the design requirements of the system.

                                                            ¡¡¡¡Key Words: The missile-borne computer FPGA AD acquisition Serial communication CAN communication

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